For students interested in the physical bases and practical methods of silicon VLSI chip fabrication, or the impact of technology on device and circuit design, or intending to pursue doctoral research involving the use of Stanford's Nanofabrication laboratory. Process simulators illustrate concepts. Topics: principles of integrated circuit fabrication processes, physical and chemical models for crystal growth, oxidation, ion implantation, etching, deposition, lithography, and back-end processing. Required for EE 410.
3 units · Letter or Credit/No Credit
For students interested in the physical bases and practical methods of silicon VLSI chip fabrication, or the impact of technology on device and circuit design, or intending to pursue doctoral research involving the use of Stanford's Nanofabrication laboratory. Process simulators illustrate concepts. Topics: principles of integrated circuit fabrication processes, physical and chemical models for crystal growth, oxidation, ion implantation, etching, deposition, lithography, and back-end processing. Required for 410.
Offered in Autumn 2026 at Stanford University.