Stanford Root

Schedule

Stanford Root

Schedule

EE 214B

Advanced Integrated Circuit Design

UNITS:3
GRADING:Letter (ABCD/NP)
LEVEL:Graduate
GER:—

Analysis and design of analog and digital integrated circuits in advanced CMOS technology. Emphasis on compact modeling of performance limiting aspects and intuitive approaches to design. Analytical treatment of noise; analog circuit sizing using the transconductance to current ratio; analysis and design of feedback circuits. Delay analysis of digital logic gates; decoder design using logical effort. CMOS image sensors are used as a motivating application example.

Syllabus for selected term:
View Winter 2027 Syllabus

Sections

1 Term
Lecture 1Open
ID: 1895
0 / 75 enrolled
DAYS:Monday, Wednesday, Friday
TIME:9:30 AM – 10:20 AM
LOCATION:TBD
INSTRUCTOR:
Dragone, Angelo
3units

EE 214B: Advanced Integrated Circuit Design

3 units · Letter (ABCD/NP)

Analysis and design of analog and digital integrated circuits in advanced CMOS technology. Emphasis on compact modeling of performance limiting aspects and intuitive approaches to design. Analytical treatment of noise; analog circuit sizing using the transconductance to current ratio; analysis and design of feedback circuits. Delay analysis of digital logic gates; decoder design using logical effort. CMOS image sensors are used as a motivating application example.

Offered in Winter 2027 at Stanford University.

Winter 2027 sections

  • Lecture — Monday Wednesday Friday 9:30 AM – 10:20 AM — Dragone, Angelo (Graduate)

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