This course will introduce you to mixed signal design and the electronic design automation (EDA) tools used for it. Working in teams, you will create a chip with a digital deep neural network (DNN) accelerator and a small analog block using a modern design flow and EDA tools. The project involves writing a synthesizable C++ and a Verilog model of your chip, creating a testing/debug strategy for your chip, wrapping custom layout to fit into a standard cell system, using synthesis and place and route tools to create the layout of your chip, and understanding all the weird stuff you need to do to tape-out a chip. Useful for anyone who will build a chip in their Ph.D.
3-4 units · Letter or Credit/No Credit
This course will introduce you to mixed signal design and the electronic design automation (EDA) tools used for it. Working in teams, you will create a chip with a digital deep neural network (DNN) accelerator and a small analog block using a modern design flow and EDA tools. The project involves writing a synthesizable C++ and a Verilog model of your chip, creating a testing/debug strategy for your chip, wrapping custom layout to fit into a standard cell system, using synthesis and place and route tools to create the layout of your chip, and understanding all the weird stuff you need to do to tape-out a chip. Useful for anyone who will build a chip in their Ph.D.
Offered in Winter 2027 at Stanford University.